1. Field of Invention
The present invention relates to a thin film semiconductor element and a method of manufacturing the same
2. Description of Related Art
In active matrix substrates constituting electro-optical devices, such as liquid crystal display devices, thin film transistors (TFTs) have been used as switching elements. According to recent trend, patterning wiring lines finely for a TFT circuit accompanied with the narrow pixel pitch in a liquid crystal display device, or lowering TFT driving power accompanied with making the substrate large are required.
From the point of view, it has been considered to adopt a low resistance metal as a material for wiring lines or electrodes, such as gate electrodes or source and drain electrodes, in the TFT circuit. Particularly, it has been suggested that an aluminum-based material is used as the low resistance metal. See, for example, Japanese Unexamined Patent Application Publication No. 10-20345.
As a material for Al electrodes (wiring lines), Al alloys added with a few atom percent of Cu (copper), Nd (neodymium) and the like are conventionally used in addition to a high purity Al. Further, a laminated structure is used, in which an Al electrode is interposed between a cap layer for preventing the generation of corrosion or hillock and a barrier layer for preventing mutual diffusion between Al metal and a base film material.
FIGS. 8(a) to 8(d) show processes of manufacturing a TFT having an Al electrode with a laminated structure.
First, as shown in FIG. 8(a), an insulating layer 2, a semiconductor layer 5, a gate insulating layer 6, and a gate electrode 100 are formed in order on a transparent substrate 1. In FIG. 8(a), the semiconductor layer 5 and the gate electrode 100 can be formed by a patterning method using a conventional photolithography technique. Further, the semiconductor layer 5 can include a source region 5S, a channel region 5C, and a drain region 5D that are formed by ion doping. Furthermore, the gate electrode 100 has a laminated structure in which a Ti (titanium) layer, an Al (aluminum) layer, and a TiN (titanium nitride) layer are formed in this order on the gate insulating layer 6. The Ti (titanium) layer and the TiN (titanium nitride) layer play roles of a barrier layer and a cap layer, respectively.
Next, as shown in FIG. 8(b), a first interlayer insulating film 20 covers the gate electrode 100 and the gate insulating layer 6. Since the first interlayer insulating film 20 is formed in the same shape as the uneven shape of the gate electrode 100 and the gate insulating layer 6, the surface thereof have an uneven shape corresponding to the surface shape of the gate electrode 100 and the insulating layer 6. Further, in the first interlayer insulating film, contact holes 21 are formed to reveal the source region 5S and the drain region 5D.
Next, as shown in FIG. 8(c), the source and drain electrode material SD is formed to cover the first interlayer insulating film 20. Here, the source and drain electrode material SD has a laminated structure in which a Ti (titanium) layer, an Al (aluminum) layer, and a TiN (titanium nitride) layer are formed in this order on the first interlayer insulating film 20. Since the source and drain electrode material SD is formed in the same shape as the uneven shape of the first interlayer insulating film 20, the surface thereof has an uneven shape corresponding to the surface shape of the first interlayer insulating film 20.
Next, as shown in FIG. 8(d), patterning the source and drain electrode material SD using a photolithography method forms a drain electrode 23 and a source electrode 24.
In such a semiconductor element, by the potential difference between the gate electrode 100 and the semiconductor layer 5, the electric field of the gate electrode 100 affects the channel region 5C to trigger a switching operation between the source region 5S and the drain region 5D.